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| IN74HC132A QUAD 2-INPUT NAND GATE WITH SCHMITT-TRIGGER INPUTS High-Performance Silicon-Gate CMOS The IN74HC132A is identical in pinout to the LS/ALS132. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. The IN74HC132A can be used to enhance noise immunity or to square up slowly changing waveforms. Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 A High Noise Immunity Characteristic of CMOS Devices ORDERING INFORMATION IN74HC132AN Plastic IN74HC132AD SOIC TA = -55 to 125 C for all packages LOGIC DIAGRAM PIN ASSIGNMENT * * * * FUNCTION TABLE Inputs Output A B Y L L H L H H H L H H H L PIN 14 =VCC PIN 7 = GND 1 IN74HC132A MAXIMUM RATINGS* Symbol Parameter Value Unit VCC DC Supply Voltage (Referenced to GND) -0.5 to +7.0 V VIN DC Input Voltage (Referenced to GND) -1.5 to VCC +1.5 V VOUT DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V IIN DC Input Current, per Pin mA 20 IOUT DC Output Current, per Pin mA 25 ICC DC Supply Current, VCC and GND Pins mA 50 PD Power Dissipation in Still Air, Plastic DIP+ 750 mW SOIC Package+ 500 Tstg Storage Temperature -65 to +150 C 260 TL Lead Temperature, 1 mm from Case for 10 C Seconds (Plastic DIP or SOIC Package) * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/C from 65 to 125C SOIC Package: : - 7 mW/C from 65 to 125C RECOMMENDED OPERATING CONDITIONS Symbol Parameter VCC DC Supply Voltage (Referenced to GND) VIN, VOUT DC Input Voltage, Output Voltage (Referenced to GND) TA Operating Temperature, All Package Types t r, tf Input Rise and Fall Time (Figure 1) * Min 2.0 0 -55 - Max 6.0 VCC +125 no limit* Unit V V C ns When VIN 0.5VCC, ICC> > quiescent current. This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND(VIN or VOUT)VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. 2 IN74HC132A DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND) Guaranteed Limit VC C Symbol Parameter Test Conditions V VT+max Maximum Positive-Going Input Threshold Voltage VT+min Minimum Positive-Going Input Threshold Voltage VT-max Maximum Negative-Going Input Threshold Voltage VT-min Minimum Negative-Going Input Threshold Voltage VHmax Maximum Note Hysteresis Voltage VHmin Minimum Note Hysteresis Voltage VOH Minimum HighLevel Output Voltage VOUT=0.1 V IOUT 20 A VOUT=0.1 V IOUT 20 A VOUT=VCC-0.1 V IOUT 20 A VOUT=VCC-0.1 V IOUT 20 A VOUT=0.1 V or VCC-0.1 V IOUT 20 A VOUT=0.1 V or VCC-0.1 V IOUT 20 A VINVT-min or VT+max Iout 20 A VINVT-min or VT+max IOUT 4.0 mA IOUT 5.2 mA VIN VT+max IOUT 20 A VIN VT+max IOUT 4.0 mA IOUT 5.2 mA VIN=VCC or GND 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 6.0 25 C to -55C 1.5 3.15 4.2 1.0 2.3 3.0 0.9 2.0 2.6 0.3 0.9 1.2 1.2 2.25 3.0 0.2 0.4 0.5 1.9 4.4 5.9 3.98 5.48 0.1 0.1 0.1 0.26 0.26 0.1 1.0 85 C 1.5 3.15 4.2 0.95 2.25 2.95 0.95 2.05 2.65 0.3 0.9 1.2 1.2 2.25 3.0 0.2 0.4 0.5 1.9 4.4 5.9 3.84 5.34 0.1 0.1 0.1 0.33 0.33 1.0 10 125 C 1.5 3.15 4.2 0.95 2.25 2.95 0.95 2.05 2.65 0.3 0.9 1.2 1.2 2.25 3.0 0.2 0.4 0.5 1.9 4.4 5.9 3.7 5.2 0.1 0.1 0.1 0.4 0.4 1.0 40 Unit V V V V V V V VOL Maximum LowLevel Output Voltage V Maximum Input Leakage Current VIN=VCC or GND ICC Maximum 6.0 Quiescent Supply IOUT=0A Current (per Package) Note. VHmin>(VT+min)-(VT-max); VHmax=(VT+max)+(VT-min). IIN A A 3 IN74HC132A AC ELECTRICAL CHARACTERISTICS(CL=50pF,Input tr=tf=6.0 ns) Guaranteed Limit VCC Symbol Parameter V 25 C 85C 125 to C -55C 190 155 125 tPLH, Maximum Propagation Delay, Input A or 2.0 38 31 25 tPHL B to Output Y (Figures 1 and 2) 4.5 32 26 21 6.0 110 95 75 tTLH, tTHL Maximum Output Transition Time, Any 2.0 22 19 15 4.5 Output 19 16 13 6.0 (Figures 1 and 2) CIN Maximum Input Capacitance 10 10 10 Power Dissipation Capacitance (Per Gate) Used to determine the no-load dynamic power consumption: PD=CPDVCC2f+ICCVCC Typical @25C,VCC=5.0 V 24 pF Unit ns ns pF CPD * Includes all probe and jig capacitance. Figure 2. Test Circuit Figure 1. Switching Waveforms 4 |
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